mirror of http://shamusworld.gotdns.org/git/rmac
173 lines
6.8 KiB
C
173 lines
6.8 KiB
C
//
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// RMAC - Renamed Macro Assembler for all Atari computers
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// AMODE.H - Addressing Modes
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// Copyright (C) 199x Landon Dyer, 2011-2021 Reboot and Friends
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// RMAC derived from MADMAC v1.07 Written by Landon Dyer, 1986
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// Source utilised with the kind permission of Landon Dyer
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//
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#ifndef __AMODE_H__
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#define __AMODE_H__
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#include "rmac.h"
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// 68000 and 68020 addressing modes
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#define DREG 000 // Dn
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#define AREG 010 // An
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#define AIND 020 // (An)
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#define DINDW 0112 // (Dn.w)
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#define DINDL 0113 // (Dn.l)
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#define APOSTINC 030 // (An)+
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#define APREDEC 040 // -(An)
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#define ADISP 050 // (d16,An) d16(An)
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#define AINDEXED 060 // (d8,An,Xn) d8(An,Xn)
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#define ABSW 070 // xxx.W
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#define ABSL 071 // xxx or xxx.L
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#define PCDISP 072 // (d16,PC) d16(PC)
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#define PCINDEXED 073 // (d16,PC,Xn) d16(PC,Xn)
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#define IMMED 074 // #data
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#define ABASE 0100 // (bd,An,Xn)
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#define MEMPOST 0101 // ([bd,An],Xn,od)
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#define MEMPRE 0102 // ([bc,An,Xn],od)
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#define PCBASE 0103 // (bd,PC,Xn)
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#define PCMPOST 0104 // ([bd,PC],Xn,od)
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#define PCMPRE 0105 // ([bc,PC,Xn],od)
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#define AM_USP 0106
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#define AM_SR 0107
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#define AM_CCR 0110
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#define AM_NONE 0111 // Nothing
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#define CACHES 0120 // Instruction/Data/Both Caches (IC/DC/BC)
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#define CREG 0121 // Control registers (see CREGlut in mach.c)
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#define FREG 0122 // FPU registers (fp0-fp7)
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#define FPSCR 0123 // FPU system control registers (fpiar, fpsr, fpcr)
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// Addressing-mode masks
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#define M_DREG 0x00000001L // Dn
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#define M_AREG 0x00000002L // An
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#define M_AIND 0x00000004L // (An)
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#define M_APOSTINC 0x00000008L // (An)+
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#define M_APREDEC 0x00000010L // -(An)
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#define M_ADISP 0x00000020L // (d16,An) d16(An)
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#define M_AINDEXED 0x00000040L // (d8,An,Xn) d8(An,Xn)
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#define M_ABSW 0x00000080L // xxx.W
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#define M_ABSL 0x00000100L // xxx or xxx.L
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#define M_PCDISP 0x00000200L // (d16,PC) d16(PC)
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#define M_PCINDEXED 0x00000400L // (d16,PC,Xn) d16(PC,Xn)
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#define M_IMMED 0x00000800L // #data
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#define M_ABASE 0x00001000L // (bd,An,Xn)
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#define M_MEMPOST 0x00002000L // ([bd,An],Xn,od)
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#define M_MEMPRE 0x00004000L // ([bd,An,Xn],od)
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#define M_PCBASE 0x00008000L // (bd,PC,Xn)
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#define M_PCMPOST 0x00010000L // ([bd,PC],Xn,od)
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#define M_PCMPRE 0x00020000L // ([bc,PC,Xn],od)
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#define M_AM_USP 0x00040000L // USP
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#define M_AM_SR 0x00080000L // SR
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#define M_AM_CCR 0x00100000L // CCR
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#define M_AM_NONE 0x00200000L // (nothing)
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#define M_BITFLD 0x00400000L // 68020 bitfield
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#define M_CREG 0x00800000L // Control registers
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#define M_FREG 0x01000000L // FPn
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#define M_FPSCR 0x02000000L // fpiar, fpsr, fpcr
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#define M_CACHE40 0x04000000L // 68040 cache registers (IC40,DC40,BC40)
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// Addr mode categories
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#define C_ALL 0x00000FFFL
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#define C_DATA 0x00000FFDL
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#define C_MEM 0x00000FFCL
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#define C_CTRL 0x000007E4L
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#define C_ALT 0x000001FFL
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#define C_ALL030 0x0003FFFFL
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#define C_ALT030 0x000071FDL
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#define C_FPU030 0x0003FFECL /* (An), #<data>, (An)+, (d16,An), (d16,PC), (d8, An, Xn), (d8, PC, Xn), (bd, An, Xn), An(bd, PC, Xn), ([bd, An, Xn], od), An([bd, PC, Xn], od), ([bd, An], Xn, od), An([bd, PC], Xn, od) */
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#define C_CTRL030 0x0003F7E4L
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#define C_DATA030 0x0003FFFDL
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#define C_MOVES (M_AIND | M_APOSTINC | M_APREDEC | M_ADISP | M_AINDEXED | M_ABSW | M_ABSL | M_ABASE | M_MEMPRE | M_MEMPOST)
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#define C_BF1 (M_DREG | M_AIND | M_AINDEXED | M_ADISP | M_ABSW | M_ABSL | M_ABASE | M_MEMPOST | M_MEMPRE)
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#define C_BF2 (C_BF1 | M_PCDISP | M_PCINDEXED | M_PCBASE | M_PCMPOST | M_PCMPRE)
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#define C_PMOVE (M_AIND | M_ADISP | M_AINDEXED | M_ABSW | M_ABSL | M_ABASE | M_MEMPRE | M_MEMPOST)
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#define C_ALTDATA (C_DATA & C_ALT)
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#define C_ALTMEM (C_MEM & C_ALT)
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#define C_ALTCTRL (C_CTRL & C_ALT)
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#define C_LABEL (M_ABSW | M_ABSL)
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#define C_NONE M_AM_NONE
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#define C_CREG (M_AM_USP | M_CREG)
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// Scales
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#define TIMES1 00000 // (empty or *1)
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#define TIMES2 01000 // *2
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#define TIMES4 02000 // *4
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#define TIMES8 03000 // *8
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#define M_FC (M_IMMED | M_DREG | M_CREG)
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#define M_MRN (M_DREG | M_AREG | M_CREG)
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// EA extension word
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#define EXT_D 0x0000 // Dn
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#define EXT_A 0x8000 // An
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#define EXT_W 0x0000 // Index Size Sign-Extended Word
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#define EXT_L 0x0800 // Index Size Long Word
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#define EXT_TIMES1 0x0000 // Scale factor 1
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#define EXT_TIMES2 0x0200 // Scale factor 2
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#define EXT_TIMES4 0x0400 // Scale factor 4
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#define EXT_TIMES8 0x0600 // Scale factor 8
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#define EXT_FULLWORD 0x0100 // Use full extension word format
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#define EXT_BS 0x0080 // Base Register Suppressed
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#define EXT_IS 0x0040 // Index Operand Suppressed
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#define EXT_BDSIZE0 0x0010 // Base Displacement Size Null (Suppressed)
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#define EXT_BDSIZEW 0x0020 // Base Displacement Size Word
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#define EXT_BDSIZEL 0x0030 // Base Displacement Size Long
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// Indirect and Indexing Operands
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#define EXT_IISPRE0 0x0000 // No Memory Indirect Action
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#define EXT_IISPREN 0x0001 // Indirect Preindexed with Null Outer Displacement
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#define EXT_IISPREW 0x0002 // Indirect Preindexed with Word Outer Displacement
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#define EXT_IISPREL 0x0003 // Indirect Preindexed with Long Outer Displacement
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#define EXT_IISPOSN 0x0005 // Indirect Postindexed with Null Outer Displacement
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#define EXT_IISPOSW 0x0006 // Indirect Postindexed with Word Outer Displacement
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#define EXT_IISPOSL 0x0007 // Indirect Postindexed with Long Outer Displacement
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#define EXT_IISNOI0 0x0000 // No Memory Indirect Action
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#define EXT_IISNOIN 0x0001 // Memory Indirect with Null Outer Displacement
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#define EXT_IISNOIW 0x0002 // Memory Indirect with Word Outer Displacement
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#define EXT_IISNOIL 0x0003 // Memory Indirect with Long Outer Displacement
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#define EXPRSIZE 128 // Maximum #tokens in an expression
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// Addressing mode variables, output of amode()
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extern int nmodes;
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extern int am0, am1;
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extern int a0reg, a1reg, a2reg;
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extern TOKEN a0expr[], a1expr[];
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extern uint64_t a0exval, a1exval;
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extern WORD a0exattr, a1exattr;
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extern int a0ixreg, a1ixreg;
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extern int a0ixsiz, a1ixsiz;
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extern TOKEN a0oexpr[], a1oexpr[];
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extern uint64_t a0oexval, a1oexval;
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extern WORD a0oexattr, a1oexattr;
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extern SYM * a0esym, * a1esym;
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extern uint64_t a0bexval, a1bexval;
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extern WORD a0bexattr, a1bexattr;
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extern WORD a0bsize, a1bsize;
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extern TOKEN a0bexpr[], a1bexpr[];
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extern WORD a0extension, a1extension;
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extern WORD mulmode;
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extern int bfparam1;
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extern int bfparam2;
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extern int bfval1;
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extern int bfval2;
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extern uint64_t bf0exval;
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// mnattr:
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#define CGSPECIAL 0x8000 // Special (don't parse addr modes)
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// Exported functions
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int amode(int);
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int reglist(WORD *);
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int fpu_reglist_left(WORD *);
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int fpu_reglist_right(WORD *);
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#endif // __AMODE_H__
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