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Add support for some missing ptestr/ptestrw/fsmove/fdmove. Add DSM in directives tab

This commit is contained in:
ggn 2020-01-16 11:47:59 +02:00 committed by Shamus Hammons
parent fbbe9b115f
commit 3492e185b1
5 changed files with 111 additions and 27 deletions
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4
68k.mch
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@ -710,8 +710,8 @@ psgs BN C_MOVES M_AM_NONE %111100000101101 m_fscc
pscs BN C_MOVES M_AM_NONE %111100000101110 m_fscc
pscc BN C_MOVES M_AM_NONE %111100000101111 m_fscc
ptestr N M_FC M_IMMED %1111000000eeeeee m_ptest
ptestw N M_FC M_IMMED %1111000000eeeeee m_ptest
ptestr N M_FC C_PMOVE %1111000000eeeeee m_ptestr
ptestw N M_FC C_PMOVE %1111000000eeeeee m_ptestw
ptrapbs WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001100000 m_ptrapcc
ptrapbc WLN M_IMMED|M_AM_NONE M_AM_NONE %1111000001100001 m_ptrapcc

3
direct.tab
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@ -111,7 +111,8 @@ nofpu 65
.opt 66
opt 66
.objproc 67
.dsm 68
dsm 68
.if 500
if 500
.else 501

118
mach.c
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@ -85,7 +85,9 @@ int m_pflushan(WORD inst, WORD siz);
int m_pload(WORD inst, WORD siz, WORD extension);
int m_pmove(WORD inst, WORD siz);
int m_pmovefd(WORD inst, WORD siz);
int m_ptest(WORD inst, WORD siz);
int m_ptest(WORD inst, WORD siz, WORD extension);
int m_ptestr(WORD inste, WORD siz);
int m_ptestw(WORD inste, WORD siz);
int m_ptrapcc(WORD inst, WORD siz);
int m_ploadr(WORD inst, WORD siz);
int m_ploadw(WORD inst, WORD siz);
@ -2400,6 +2402,9 @@ int m_pload(WORD inst, WORD siz, WORD extension)
if ((a0exattr & DEFINED) == 0)
return error("constant value must be defined");
if (a0exval>7)
return error("constant value must be between 0 and 7");
inst = (2 << 3) | (uint16_t)a0exval;
break;
}
@ -2563,20 +2568,103 @@ int m_ptrapcc(WORD inst, WORD siz)
//
// ptestr, ptestw (68030)
// ptestr, ptestw (68030, 68040)
// TODO See comment on m_pmove about 68851 support
// TODO quite a good chunk of the 030 code is copied from m_pload, perhaps merge these somehow?
//
int m_ptest(WORD inst, WORD siz)
int m_ptest(WORD inst, WORD siz, WORD extension)
{
CHECKNO30;
uint64_t eval;
if (activecpu != CPU_68030 && activecpu != CPU_68040)
return error(unsupport);
if (activecpu == CPU_68030)
return error("Not implemented yet.");
else if (activecpu == CPU_68040)
{
inst |= am1;
D_word(inst);
switch (am0)
{
case CREG:
if (a0reg == KW_SFC - KW_SFC)
extension |= 0;
else if (a0reg == KW_DFC - KW_SFC)
extension |= 1;
else
return error("illegal control register specified");
break;
case DREG:
extension |= (1 << 3) | a0reg;
break;
case IMMED:
if ((a0exattr & DEFINED) == 0)
return error("constant value must be defined");
if (a0exval > 7)
return error("constant value must be between 0 and 7");
extension |= (2 << 3) | (uint16_t)a0exval;
break;
}
// Operand 3 must be an immediate
CHECK_COMMA
if (*tok++ != '#')
return error("ptest level must be immediate");
// Let's be a bit inflexible here and demand that this
// is fully defined at this stage. Otherwise we'd have
// to arrange for a bitfield fixup, which would mean
// polluting the bitfields and codebase with special
// cases that might most likely never be used.
// So if anyone gets bit by this: sorry for being a butt!
if (abs_expr(&eval) != OK)
return OK; // We're returning OK because error() has already been called and error count has been increased
if (eval > 7)
return error("ptest level must be between 0 and 7");
extension |= eval << 10;
// Operand 4 is optional and must be an address register
if (*tok != EOL)
{
CHECK_COMMA
if ((*tok >= KW_A0) && (*tok <= KW_A7))
{
extension |= (1 << 8) | ((*tok++ & 7) << 4);
}
else
{
return error("fourth parameter must be an address register");
}
}
ErrorIfNotAtEOL();
D_word(extension);
return OK;
}
else
return error("Not implemented yet.");
return ERROR;
}
int m_ptestr(WORD inst, WORD siz)
{
return m_ptest(inst, siz, (1 << 15) | (0 << 9));
}
int m_ptestw(WORD inst, WORD siz)
{
return m_ptest(inst, siz, (1 << 15) | (1 << 9));
}
//////////////////////////////////////////////////////////////////////////////
//
// 68020/30/40/60 instructions
@ -3155,14 +3243,7 @@ int m_fsmove(WORD inst, WORD siz)
if (!(activefpu & (FPU_68040 | FPU_68060)))
return error("Unsupported in current FPU");
return error("Not implemented yet.");
#if 0
if (activefpu == FPU_68040)
return gen_fpu(inst, siz, B8(01100100), FPU_P_EMUL);
else
return error("Unsupported in current FPU");
#endif
return gen_fpu(inst, siz, B8(01100100), FPU_FPSP);
}
@ -3171,14 +3252,7 @@ int m_fdmove(WORD inst, WORD siz)
if (!(activefpu & (FPU_68040 | FPU_68060)))
return error("Unsupported in current FPU");
return error("Not implemented yet.");
#if 0
if (activefpu == FPU_68040)
return gen_fpu(inst, siz, B8(01100100), FPU_P_EMUL);
else
return error("Unsupported in current FPU");
#endif
return gen_fpu(inst, siz, B8(01100100), FPU_FPSP);
}

9
procln.c
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@ -845,8 +845,13 @@ When checking to see if it's already been equated, issue a warning.
if (amode(1) < 0) // Parse 0, 1 or 2 addr modes
goto loop;
if (*tok != EOL)
error(extra_stuff);
// Check that we're at EOL
// The only exception is ptestr/ptestw instructions
// that have 3 or 4 operands and are not handled by
// amode(). (yes, we're taking a performance hit here sadly)
if (m->mnfunc != m_ptestr && m->mnfunc != m_ptestw)
if (*tok != EOL)
error(extra_stuff);
amsk0 = amsktab[am0];
amsk1 = amsktab[am1];

4
procln.h
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@ -12,6 +12,10 @@
#include "rmac.h"
#include "token.h"
// Imported functions
int m_ptestr(WORD inste, WORD siz);
int m_ptestw(WORD inste, WORD siz);
// Exported variables
extern const char comma_error[];
extern const char locgl_error[];